Graphene is a 2-dimensional, semi-metallic, atomically-thin film in which carbon atoms are arranged into a sp2 honeycomb lattice structurally relying on in-plane, covalent σ-bonds. It is also chemically stable in non-oxidizing environments, and is mechanically very stiff. Its electronic transport properties have been found to be largely superior to those of materials traditionally employed in microelectronics. More specifically, charge transport and/or charge mobility are important aspects of graphene. Graphene has also the properties of very high mobility at room temperature (104-106 cm2 V−1 s−1). Therefore, graphene is one of the most promising candidates as material for post-CMOS applications.
Single layer graphene (SLG) is a gapless (bandgap-free) semimetal. As a consequence, field effect transistors (FETs) using SLG as active channel exhibit a poor on-current/off current Ion/Ioff ratio (generally ˜10), and they cannot be switched off. This is one of the main limiting factors hampering the use of graphene in microelectronics for logic applications.
Bilayer graphene (BLG) consists of two SLG stacked vertically and interacting via their pi-bonds, BLG shares with SLG the zero bandgap character and is therefore a semimetal too. However, a bandgap can be introduced (also often referred to as bandgap opening or bandgap widening) in BLG if the inversion symmetry of the two stacked layers is broken by the use of an external electric field, applied perpendicularly to the BLG plane. BLG then becomes a semiconductor with a bandgap that depends on the strength of the applied electric field. The maximum value of the bandgap that can be induced depends solely on interlayer coupling energy. The bandgap thus obtained is in the range of 0 to 300 meV and results in an on-current/off current Ion/Ioff ratio of the field effect transistor of about 100.
So far, the bandgap opening in BLG by vertical symmetry breaking, as described above, has been achieved in two ways: chemical doping by opening up of the bandgap in BLG by adsorbates or electrical doping by an electric displacement field generated by a gate electrode.
The first approach (i.e. chemical doping), however, is not easily controlled as the dopants tend to spread non-uniformly on the BLG. Furthermore, the dopant tends to migrate and interact with graphene, creating defects leading to device performance stability problems. Also, the deposition of dopants is so far hardly compatible with typical CMOS process flows. Also dopant profile engineering is not sufficient as, due to the weak nature of the interaction of graphene and adsorbates, it is very difficult to achieve homogeneous dopant profiles along the graphene.
In the second approach (i.e. electrical doping), an external gate stack in direct contact with BLG (e.g. a top gate stack) is used to establish an electric displacement field perpendicular to the BLG plane.
The small achievable bandgap and the large band-to-band tunnelling in BLG may be exploited to build tunnelling field effect transistors (further referred to as TFETs), which can result in an even larger Ion/Ioff ratio and a subthreshold swing below that obtained in conventional FETs. A TFET comprises a tunnel barrier, which comprises contiguous a p-type doped, an intrinsic and an n-type doped region (p-i-n) whereas conventional FETs only has p-n regions. The height of the tunnel barrier can be modulated by the TFET gate potential, thereby controlling the transport current of the TFET. Hence the device can be switched on and off by controlling the band bending in the channel region by means of a gate voltage bias.
The operation of such a TFET requires abrupt p-type doped, intrinsic and n-type doped regions. With current state of the art it is very challenging to achieve steep shallow dopant profiles (and thus abrupt p-i-n junctions) which are necessary for sub-100 nm technologies.
There is therefore a need for new BLG TFET architectures allowing inducing an adjustable transverse electrical field sufficiently large to open a band gap in the BLG. In particular this electrical field may be an electric displacement field larger than 3.5 V/nm across the bilayer. There is also a need for creating semiconducting n-i-p (or p-i-n) regions with abrupt junctions. There is also a need in the art for an architecture having a low impact on the structural integrity of graphene and on the stability of the device.